Amorphous silicon has been used in semiconductor devices, but such devices have not enjoyed the popularity of more conventional monocrystalline semiconductor devices. Amorphous silicon semiconductors have the advantage of being fabricatable on flexible substrates, and thus present the possibility of formation on a number of different kinds of substrates, unlike the crystalline semiconductor substrate conventionally used. The non-crystalline properties of amorphous silicon semiconductors also present the opportunity for forming very large scale devices, since such devices are not limited by the crystal and die size limitations normally associated with crystalline semiconductors.
Amorphous silicon devices, however, possess a number of significant drawbacks. First of all, leakage through the amorphous semiconductor material is typically quite high, making it difficult to isolate one device from another. Switching speed and frequency response is not suitable for many applications. Amorphous silicon semiconductor devices have been utilized extensively in large scale solar cells, for example, where the tradeoff allowing large size and flexibility outweighs the disadvantages. Amorphous silicon devices have also been used in very large scale memories which were impractical of construction with conventional crystalline semiconductors. However, in the majority of situations, where requirements of switching speed and device size akin to current semiconductor technology are required, amorphous silicon devices have typically not been applied.
Even MOS devices, although not as fast as bipolar semiconductors, have been improved to realize relatively fast switching speeds. However, the physical structure of a MOS device has a very, very thin layer of oxide interposed between metallic electrodes and the doped surface of the silicon semiconductor material. The very small capacitance introduced by the very thin insulating layer (typically silicon dioxide) allows the voltage impressed on the electrodes to set up fields (depletion regions) in the semiconductor material just below the surface. However, equivalent devices are not possible in amorphous silicon for a variety of reasons. The end result is that typically, comparatively thicker layers of dielectric material are required to be interposed between the gate metallization and the amorphous silicon layer, whereas there is no requirement for insulation between the source and drain electrodes and the corresponding doped areas of the amorphous silicon transistor. This fundamental structural difference is in part responsible for the relative slowness in switching of amorphous silicon devices. However, that relative slowness has been tolerated because of the applications in which the devices have typically been employed.
Conventional semiconductor technology has progressed to very large scale integration which includes literally thousands of devices (transistors and the like) in a single circuit, and all of very small feature size. The approaches utilized in conventional semiconductor technology have not been applicable to amorphous silicon circuits for some of the reasons noted above. While it is generally appreciated that an extremely large number of devices is possible in amorphous silicon technology, because of the elimination of substrate size limitations, with the exception of solar cells and other relatively large feature size devices, the technology has not progressed in that direction.